How to use the vsg.utils.create_violation_dict function in vsg

def _analyze(self, oFile, oLine, iLineNumber):
        if oLine.isArchitectureKeyword:
            self.sLabel = oLine.line.split()[1]
        if oLine.isEndArchitecture and not re.match('^\s*end\s+architecture\s+\w+', oLine.line, re.IGNORECASE):
            if re.match('^\s*end\s+architecture', oLine.line, re.IGNORECASE):
                dViolation = utils.create_violation_dict(iLineNumber)
                dViolation['label'] = self.sLabel
                self.add_violation(dViolation)
            elif not re.match('^\s*end\s+\w+', oLine.line, re.IGNORECASE):
                dViolation = utils.create_violation_dict(iLineNumber)
                dViolation['label'] = self.sLabel
                self.add_violation(dViolation)

def _analyze(self, oFile, oLine, iLineNumber):
        if '\t' in oLine.line:
            dViolation = utils.create_violation_dict(iLineNumber)
            self.add_violation(dViolation)

dViolation = utils.create_violation_dict(iLineNumber)
            self.add_violation(dViolation)
        if re.match('^.* and\(', sLine, flags=re.IGNORECASE):
            dViolation = utils.create_violation_dict(iLineNumber)
            self.add_violation(dViolation)
        if re.match('^.* nand\(', sLine, flags=re.IGNORECASE):
            dViolation = utils.create_violation_dict(iLineNumber)
            self.add_violation(dViolation)
        if re.match('^.* or\(', sLine, flags=re.IGNORECASE):
            dViolation = utils.create_violation_dict(iLineNumber)
            self.add_violation(dViolation)
        if re.match('^.* nor\(', sLine, flags=re.IGNORECASE):
            dViolation = utils.create_violation_dict(iLineNumber)
            self.add_violation(dViolation)
        if re.match('^.* xor\(', sLine, flags=re.IGNORECASE):
            dViolation = utils.create_violation_dict(iLineNumber)
            self.add_violation(dViolation)
        if re.match('^.* xnor\(', sLine, flags=re.IGNORECASE):
            dViolation = utils.create_violation_dict(iLineNumber)
            self.add_violation(dViolation)

def check_spaces_between_end_and_name(self, oLine, iLineNumber):
    if re.match('^\s*end\s+\w', oLine.lineLower):
        if not re.match('^\s*end\s\w', oLine.lineLower):
            dViolation = utils.create_violation_dict(iLineNumber)
            self.add_violation(dViolation)

def check_for_blanks(self, dVars, oLine, iLineNumber):
    if dVars['fCheckForBlanks']:
        if oLine.isBlank:
            dVars['iBlankCount'] += 1
        if not oLine.isBlank and not oLine.isProcessBegin:
            dVars['iBlankCount'] = 0
        if oLine.isProcessBegin:
            if not dVars['iBlankCount'] == 1:
                dViolation = utils.create_violation_dict(iLineNumber)
                self.add_violation(dViolation)
            dVars['fSkipProcess'] = True
            dVars['fCheckForBlanks'] = False
            dVars['iBlankCount'] = 0

lContexts = oFile.get_context_declarations()
        for dContext in lContexts:
            for iLine, oLine in enumerate(dContext['lines']):
                lObjects = oLine.get_objects()
                lAnalysis = []
                bLeftFound = False
                for iObject, oObject in enumerate(lObjects):
                    if isinstance(oObject, self.left):
                        bLeftFound = True
                    if bLeftFound:
                        lAnalysis.append(oObject)
                    if isinstance(oObject, self.right):
                        if len(lAnalysis) == 3:
                            if isinstance(lAnalysis[1], parser.whitespace):
                                if lAnalysis[1].get_value() != ' ' * self.spaces:
                                    dViolation = utils.create_violation_dict(dContext['metadata']['iStartLineNumber'] + iLine)
                                    dViolation['solution'] = 'Ensure there are only ' + str(self.spaces) + ' space(s) between "' + lAnalysis[0].get_value() + '" and "' + lAnalysis[2].get_value() + '"'
                                    self.add_violation(dViolation)

def _analyze(self, oFile, oLine, iLineNumber):
        if re.match('^.*,\S', oLine.line) and not re.match('^.*--.*,\S', oLine.line):
            dViolation = utils.create_violation_dict(iLineNumber)
            self.add_violation(dViolation)

def _analyze(self, oFile, oLine, iLineNumber):
        if oLine.isPortDeclaration and ':=' in oLine.line:
            dViolation = utils.create_violation_dict(iLineNumber)
            self.add_violation(dViolation)

def _analyze(self, oFile, oLine, iLineNumber):
        if oLine.isInstantiationGenericAssignment and oLine.isInstantiationGenericKeyword:
            dViolation = utils.create_violation_dict(iLineNumber)
            self.add_violation(dViolation)

def _analyze(self, oFile, oLine, iLineNumber):
        if oLine.isGenericDeclaration and oLine.isGenericKeyword:
            dViolation = utils.create_violation_dict(iLineNumber)
            self.add_violation(dViolation)