How to use the vsg.rules.case_rule function in vsg

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github jeremiah-c-leary / vhdl-style-guide / vsg / rules / instantiation / rule_028.py View on Github external
from vsg.rules import case_rule


class rule_028(case_rule):
    '''
    Instantiation rule 028 checks the entity name is uppercase in direct instantiations.
    '''

    def __init__(self):
        case_rule.__init__(self, 'instantiation', '028', 'isDirectInstantiationDeclaration')
        self.solution = 'Change entity name to '

    def _extract(self, oLine):
        return [oLine.line.replace('.', ' ').split()[-1]]
github jeremiah-c-leary / vhdl-style-guide / vsg / rules / entity / rule_008.py View on Github external
from vsg.rules import case_rule
from vsg import utils


class rule_008(case_rule):
    '''
    Entity rule 008 checks the entity name has proper case in the entity declaration line.
    '''

    def __init__(self):
        case_rule.__init__(self, 'entity', '008', 'isEntityDeclaration')
        self.solution = 'Change entity name to '

    def _extract(self, oLine):
        return utils.extract_entity_identifier(oLine)
github jeremiah-c-leary / vhdl-style-guide / vsg / rules / if_statement / rule_026.py View on Github external
from vsg.rules import case_rule
from vsg import utils


class rule_026(case_rule):
    '''
    If rule 026 checks the "elsif" keyword has proper case.
    '''

    def __init__(self):
        case_rule.__init__(self, 'if', '026', 'isElseIfKeyword')
        self.solution = 'Change "elsif" keyword to '

    def _extract(self, oLine):
        return utils.extract_words(oLine, ['elsif'])
github jeremiah-c-leary / vhdl-style-guide / vsg / rules / package / rule_008.py View on Github external
def __init__(self):
        case_rule.__init__(self, 'package', '008', 'isPackageEnd')
        self.solution = 'Change package name to '
github jeremiah-c-leary / vhdl-style-guide / vsg / rules / component / rule_014.py View on Github external
def __init__(self):
        case_rule.__init__(self, 'component', '014', 'isComponentEnd')
        self.solution = 'Change "component" keyword to '
github jeremiah-c-leary / vhdl-style-guide / vsg / rules / instantiation / rule_013.py View on Github external
from vsg.rules import case_rule
from vsg import utils


class rule_013(case_rule):
    '''
    Instantiation rule 013 checks the "generic map" keywords have proper case.
    '''

    def __init__(self):
        case_rule.__init__(self, 'instantiation', '013', 'isInstantiationGenericKeyword')
        self.solution = 'Change "generic map" keywords to '

    def _extract(self, oLine):
        return utils.extract_words(oLine, ['generic', 'map'])
github jeremiah-c-leary / vhdl-style-guide / vsg / rules / signal / rule_002.py View on Github external
from vsg.rules import case_rule
from vsg import utils


class rule_002(case_rule):
    '''
    Signal rule 002 checks the "signal" keyword has proper case.
    '''

    def __init__(self):
        case_rule.__init__(self, 'signal', '002', 'isSignal')
        self.solution = 'Change "signal" keyword to '

    def _extract(self, oLine):
        return utils.extract_class_name(oLine)
github jeremiah-c-leary / vhdl-style-guide / vsg / rules / component / rule_006.py View on Github external
from vsg.rules import case_rule
from vsg import utils


class rule_006(case_rule):
    '''
    Component rule 006 checks the is keyword has proper case.
    '''

    def __init__(self):
        case_rule.__init__(self, 'component', '006', 'isComponentDeclaration')
        self.solution = 'Change "is" keyword to '

    def _extract(self, oLine):
        return utils.extract_words(oLine, ['is'])
github jeremiah-c-leary / vhdl-style-guide / vsg / rules / type_definition / rule_004.py View on Github external
def __init__(self):
        case_rule.__init__(self, 'type', '004', 'isTypeKeyword')
        self.solution = 'Change type identifier name to '
github jeremiah-c-leary / vhdl-style-guide / vsg / rules / signal / rule_010.py View on Github external
from vsg.rules import case_rule
from vsg import utils


class rule_010(case_rule):
    '''
    Signal rule 010 checks the signal type has proper case if it is a VHDL keyword.
    '''

    def __init__(self):
        case_rule.__init__(self, 'signal', '010', 'isSignal')
        self.solution = 'Change signal type name to '
        self.disabled = True

    def _extract(self, oLine):
        return utils.extract_type_name_vhdl_only(oLine)