How to use the dace.sdfg.InterstateEdge function in dace

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github spcl / dace / tests / intel_fpga / simple_systolic_array.py View on Github external
def make_write_A_sdfg():

    sdfg = dace.SDFG("array_write_A")

    n_begin = sdfg.add_state("n_begin")
    n_entry = sdfg.add_state("n_entry")
    n_end = sdfg.add_state("n_end")

    loop_body = sdfg.add_state("write_memory")

    sdfg.add_edge(n_begin, n_entry,
                  dace.sdfg.InterstateEdge(assignments={"n": 0}))

    sdfg.add_edge(
        n_entry, loop_body,
        dace.sdfg.InterstateEdge(
            condition=dace.properties.CodeProperty.from_string(
                "n < N", language=dace.dtypes.Language.Python)))

    sdfg.add_edge(loop_body, n_entry,
                  dace.sdfg.InterstateEdge(assignments={"n": "n + 1"}))

    sdfg.add_edge(
        n_entry, n_end,
        dace.sdfg.InterstateEdge(
            condition=dace.properties.CodeProperty.from_string(
                "n >= N", language=dace.dtypes.Language.Python)))
github spcl / dace / dace / transformation / interstate / loop_unroll.py View on Github external
if data.condition:
                    ASTFindReplace({itervar: str(i)}).visit(data.condition)

                sdfg.add_edge(src, dst, data)

            # Connect iterations with unconditional edges
            if len(unrolled_states) > 0:
                sdfg.add_edge(unrolled_states[-1][1], new_states[first_id],
                              sd.InterstateEdge())

            unrolled_states.append((new_states[first_id], new_states[last_id]))

        # Connect new states to before and after states without conditions
        if unrolled_states:
            sdfg.add_edge(before_state, unrolled_states[0][0],
                          sd.InterstateEdge())
            sdfg.add_edge(unrolled_states[-1][1], after_state,
                          sd.InterstateEdge())

        # Remove old states from SDFG
        sdfg.remove_nodes_from([guard] + loop_states)
github spcl / dace / samples / fpga / spmv_fpga_stream.py View on Github external
sdfg = SDFG("spmv_compute_nested")

    if_state = sdfg.add_state("if")
    then_state = sdfg.add_state("then")
    else_state = sdfg.add_state("else")
    end_state = sdfg.add_state("end")

    sdfg.add_edge(
        if_state, then_state,
        InterstateEdge(condition=CodeProperty.from_string(
            "c == 0", language=Language.Python)))
    sdfg.add_edge(
        if_state, else_state,
        InterstateEdge(condition=CodeProperty.from_string(
            "c != 0", language=Language.Python)))
    sdfg.add_edge(then_state, end_state, InterstateEdge())
    sdfg.add_edge(else_state, end_state, InterstateEdge())

    a_in = if_state.add_scalar("a_in",
                               dtype,
                               storage=StorageType.FPGA_Registers)
    x_in = if_state.add_scalar("x_in",
                               dtype,
                               storage=StorageType.FPGA_Registers)
    b_tmp_out = if_state.add_scalar("b_tmp",
                                    dtype,
                                    transient=True,
                                    storage=StorageType.FPGA_Registers)
    tasklet = if_state.add_tasklet("compute", {"_a_in", "_x_in"}, {"_b_out"},
                                   "_b_out = _a_in * _x_in")
    if_state.add_memlet_path(a_in,
                             tasklet,
github spcl / dace / dace / frontend / octave / ast_loop.py View on Github external
# Add state for each statement within the for loop
            prev = s_guard
            for s in self.stmts.statements:
                state = len(sdfg.nodes())
                newstate = dace.SDFGState("s" + str(state),
                                          sdfg,
                                          debuginfo=s.context)
                sdfg.add_node(newstate)
                last_state = s.generate_code(sdfg, state)
                if last_state is None: last_state = state
                if prev != s_guard:
                    edge = dace.sdfg.InterstateEdge()
                    sdfg.add_edge(prev, newstate, edge)
                else:
                    edge = dace.sdfg.InterstateEdge(
                        condition=dace.properties.CodeProperty.from_string(
                            loop_guard_var + " <= " + loop_end_var,
                            language=dace.dtypes.Language.Python))
                    sdfg.add_edge(prev, newstate, edge)
                prev = sdfg.nodes()[last_state]

            # Create inter-state back-edge
            edge = dace.sdfg.InterstateEdge(
                assignments={loop_guard_var: loop_guard_var + '+1'})
            sdfg.add_edge(prev, s_guard, edge)

            # Create the loop exit state
            state = len(sdfg.nodes())
            s_lexit = dace.SDFGState("s" + str(state),
                                     sdfg,
                                     debuginfo=s.context)
github spcl / dace / dace / transformation / interstate / loop_detection.py View on Github external
sd.InterstateEdge())
        sdfg.add_edge(DetectLoop._loop_guard, DetectLoop._exit_state,
                      sd.InterstateEdge())
        sdfg.add_edge(DetectLoop._loop_begin, DetectLoop._loop_guard,
                      sd.InterstateEdge())

        # Case 2: Loop with multiple states (no back-edge from state)
        msdfg = sd.SDFG('_')
        msdfg.add_nodes_from([
            DetectLoop._loop_guard, DetectLoop._loop_begin,
            DetectLoop._exit_state
        ])
        msdfg.add_edge(DetectLoop._loop_guard, DetectLoop._loop_begin,
                       sd.InterstateEdge())
        msdfg.add_edge(DetectLoop._loop_guard, DetectLoop._exit_state,
                       sd.InterstateEdge())

        return [sdfg, msdfg]
github spcl / dace / samples / fpga / filter_fpga_vectorized.py View on Github external
dace.sdfg.InterstateEdge(assignments={"i": 0}))

    sdfg.add_edge(
        loop_entry, state,
        dace.sdfg.InterstateEdge(
            condition=dace.properties.CodeProperty.from_string(
                "i < N + W", language=dace.dtypes.Language.Python)))

    sdfg.add_edge(
        loop_entry, loop_end,
        dace.sdfg.InterstateEdge(
            condition=dace.properties.CodeProperty.from_string(
                "i >= N + W", language=dace.dtypes.Language.Python)))

    sdfg.add_edge(state, loop_entry,
                  dace.sdfg.InterstateEdge(assignments={"i": "i + W"}))

    B = state.add_array("B_mem", [N / W],
                        dtype=vtype,
                        storage=StorageType.FPGA_Global)
    B_pipe = state.add_stream("_B_pipe",
                              dtype=vtype,
                              buffer_size=buffer_size,
                              storage=StorageType.FPGA_Local)
    valid_pipe = state.add_stream("_valid_pipe",
                                  dtype=dace.dtypes.bool,
                                  buffer_size=buffer_size,
                                  storage=StorageType.FPGA_Local)
    i_write_in = state.add_scalar("i_write",
                                  dtype=dace.dtypes.uint32,
                                  transient=True,
                                  storage=StorageType.FPGA_Registers)
github spcl / dace / samples / fpga / spmv_fpga.py View on Github external
write_back_state = sdfg.add_state("write_back")
    write_back_b_buffer = write_back_state.add_scalar(
        "b_buffer",
        dtype,
        transient=True,
        storage=dace.dtypes.StorageType.FPGA_Registers)
    write_back_b = write_back_state.add_scalar(
        "b_write", dtype, storage=dace.dtypes.StorageType.FPGA_Registers)
    write_back_state.add_memlet_path(write_back_b_buffer,
                                     write_back_b,
                                     memlet=dace.memlet.Memlet.simple(
                                         write_back_b, "0"))

    state = sdfg.add_state("compute_cols")

    sdfg.add_edge(set_zero_state, state, dace.sdfg.InterstateEdge())
    sdfg.add_edge(state, write_back_state, dace.sdfg.InterstateEdge())

    compute_entry, compute_exit = state.add_map("compute_col",
                                                {"j": "rowptr:rowend"})

    indirection_tasklet = state.add_tasklet("indirection",
                                            {"x_val_in", "col_index"},
                                            {"lookup"},
                                            "lookup = x_val_in[col_index]")

    x_in = state.add_scalar("x_in",
                            dtype,
                            storage=dace.dtypes.StorageType.FPGA_Registers,
                            transient=True)

    compute_tasklet = state.add_tasklet("compute", {"a", "x_val_in"}, {"out"},
github spcl / dace / samples / fpga / jacobi_fpga_systolic.py View on Github external
sdfg.add_edge(
        x_entry, loop_body,
        dace.sdfg.InterstateEdge(
            condition=dace.properties.CodeProperty.from_string(
                "x < W - 1", language=dace.dtypes.Language.Python)))

    sdfg.add_edge(y_end, time_entry,
                  dace.sdfg.InterstateEdge(assignments={"t": "t + 1"}))
    sdfg.add_edge(x_end, y_entry,
                  dace.sdfg.InterstateEdge(assignments={"y": "y + 1"}))
    sdfg.add_edge(loop_body, x_entry,
                  dace.sdfg.InterstateEdge(assignments={"x": "x + 1"}))

    sdfg.add_edge(
        time_entry, time_end,
        dace.sdfg.InterstateEdge(
            condition=dace.properties.CodeProperty.from_string(
                "t >= T / P", language=dace.dtypes.Language.Python)))
    sdfg.add_edge(
        y_entry, y_end,
        dace.sdfg.InterstateEdge(
            condition=dace.properties.CodeProperty.from_string(
                "y >= H", language=dace.dtypes.Language.Python)))
    sdfg.add_edge(
        x_entry, x_end,
        dace.sdfg.InterstateEdge(
            condition=dace.properties.CodeProperty.from_string(
                "x >= W", language=dace.dtypes.Language.Python)))

    pipe = loop_body.add_stream("pipe",
                                dtype,
                                1,
github spcl / dace / samples / fpga / filter_fpga.py View on Github external
dace.sdfg.InterstateEdge(assignments={"i": 0}))

    sdfg.add_edge(
        loop_entry, loop_body,
        dace.sdfg.InterstateEdge(
            condition=dace.properties.CodeProperty.from_string(
                "i < N", language=dace.dtypes.Language.Python)))

    sdfg.add_edge(
        loop_entry, write_out_size,
        dace.sdfg.InterstateEdge(
            condition=dace.properties.CodeProperty.from_string(
                "i >= N", language=dace.dtypes.Language.Python)))

    sdfg.add_edge(loop_body, loop_entry,
                  dace.sdfg.InterstateEdge(assignments={"i": "i + 1"}))

    return sdfg