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def pc_actions_INC(state, nbits, res, _, cc_ndep, platform=None):
arg_l = res - 1
arg_r = 1
cf = (cc_ndep & data[platform]['CondBitMasks']['G_CC_MASK_C'])[data[platform]['CondBitOffsets']['G_CC_SHIFT_C']]
pf = calc_paritybit(res)
af = (res ^ arg_l ^ 1)[data[platform]['CondBitOffsets']['G_CC_SHIFT_A']]
zf = calc_zerobit(res)
sf = res[nbits-1]
of = claripy.If(sf == arg_l[nbits-1], claripy.BVV(0, 1), claripy.BVV(1, 1))
return pc_make_rdata(data[platform]['size'], cf, pf, af, zf, sf, of, platform=platform)
def pc_actions_SBB(state, nbits, cc_dep1, cc_dep2, cc_ndep, platform=None):
old_c = cc_ndep[data[platform]['CondBitOffsets']['G_CC_SHIFT_C']].zero_extend(nbits-1)
arg_l = cc_dep1
arg_r = cc_dep2 ^ old_c
res = (arg_l - arg_r) - old_c
cf_c = claripy.If(claripy.ULE(arg_l, arg_r), claripy.BVV(1, 1), claripy.BVV(0, 1))
cf_noc = claripy.If(claripy.ULT(arg_l, arg_r), claripy.BVV(1, 1), claripy.BVV(0, 1))
cf = claripy.If(old_c == 1, cf_c, cf_noc)
pf = calc_paritybit(res)
af = (res ^ arg_l ^ arg_r)[data[platform]['CondBitOffsets']['G_CC_SHIFT_A']]
zf = calc_zerobit(res)
sf = res[nbits-1]
of = ((arg_l ^ arg_r) & (arg_l ^ res))[nbits-1]
return pc_make_rdata(data[platform]['size'], cf, pf, af, zf, sf, of, platform=platform)
def pc_actions_ADC(state, nbits, cc_dep1, cc_dep2, cc_ndep, platform=None):
old_c = cc_ndep & data[platform]['CondBitMasks']['G_CC_MASK_C']
arg_l = cc_dep1
arg_r = cc_dep2 ^ old_c
res = (arg_l + arg_r) + old_c
cf = claripy.If(
old_c != 0,
claripy.If(res <= arg_l, claripy.BVV(1, 1), claripy.BVV(0, 1)),
claripy.If(res < arg_l, claripy.BVV(1, 1), claripy.BVV(0, 1))
)
pf = calc_paritybit(res)
af = (res ^ arg_l ^ arg_r)[data[platform]['CondBitOffsets']['G_CC_SHIFT_A']]
zf = calc_zerobit(res)
sf = res[nbits - 1]
of = ((arg_l ^ arg_r ^ -1) & (arg_l ^ res))[nbits-1]
return pc_make_rdata(data[platform]['size'], cf, pf, af, zf, sf, of, platform=platform)
r_Z = claripy.If(r_AL == 0, one, zero)
r_P = calc_paritybit(r_AL).zero_extend(31)
elif opcode == 0x37: # AAA
nudge = r_AL > 0xF9
condition = claripy.Or((r_AL & 0xF) > 9, r_A == 1)
r_AL = claripy.If(condition, (r_AL + 6) & 0xF, r_AL & 0xF)
r_AH = claripy.If(condition, claripy.If(nudge, r_AH + 2, r_AH + 1), r_AH)
r_A = claripy.If(condition, one, zero)
r_C = claripy.If(condition, one, zero)
r_O = r_S = r_Z = r_P = 0
elif opcode == 0x3F: # AAS
nudge = r_AL < 0x06
condition = claripy.Or((r_AL & 0xF) > 9, r_A == 1)
r_AL = claripy.If(condition, (r_AL - 6) & 0xF, r_AL & 0xF)
r_AH = claripy.If(condition, claripy.If(nudge, r_AH - 2, r_AH - 1), r_AH)
r_A = claripy.If(condition, one, zero)
r_C = claripy.If(condition, one, zero)
r_O = r_S = r_Z = r_P = 0
result = ( (r_O & 1) << (16 + data['X86']['CondBitOffsets']['G_CC_SHIFT_O']) ) \
| ( (r_S & 1) << (16 + data['X86']['CondBitOffsets']['G_CC_SHIFT_S']) ) \
| ( (r_Z & 1) << (16 + data['X86']['CondBitOffsets']['G_CC_SHIFT_Z']) ) \
| ( (r_A & 1) << (16 + data['X86']['CondBitOffsets']['G_CC_SHIFT_A']) ) \
| ( (r_C & 1) << (16 + data['X86']['CondBitOffsets']['G_CC_SHIFT_C']) ) \
| ( (r_P & 1) << (16 + data['X86']['CondBitOffsets']['G_CC_SHIFT_P']) ) \
| ( (r_AH & 0xFF) << 8 ) \
| ( (r_AL & 0xFF) << 0 )
return result
def pc_actions_SHR(state, nbits, remaining, shifted, cc_ndep, platform=None):
cf = claripy.If(shifted & 1 != 0, claripy.BVV(1, 1), claripy.BVV(0, 1))
pf = calc_paritybit(remaining[7:0])
af = claripy.BVV(0, 1)
zf = calc_zerobit(remaining)
sf = remaining[nbits-1]
of = (remaining[0] ^ shifted[0])[0]
return pc_make_rdata(data[platform]['size'], cf, pf, af, zf, sf, of, platform=platform)
def pc_actions_SBB(state, nbits, cc_dep1, cc_dep2, cc_ndep, platform=None):
old_c = cc_ndep[data[platform]['CondBitOffsets']['G_CC_SHIFT_C']].zero_extend(nbits-1)
arg_l = cc_dep1
arg_r = cc_dep2 ^ old_c
res = (arg_l - arg_r) - old_c
cf_c = claripy.If(claripy.ULE(arg_l, arg_r), claripy.BVV(1, 1), claripy.BVV(0, 1))
cf_noc = claripy.If(claripy.ULT(arg_l, arg_r), claripy.BVV(1, 1), claripy.BVV(0, 1))
cf = claripy.If(old_c == 1, cf_c, cf_noc)
pf = calc_paritybit(res)
af = (res ^ arg_l ^ arg_r)[data[platform]['CondBitOffsets']['G_CC_SHIFT_A']]
zf = calc_zerobit(res)
sf = res[nbits-1]
of = ((arg_l ^ arg_r) & (arg_l ^ res))[nbits-1]
return pc_make_rdata(data[platform]['size'], cf, pf, af, zf, sf, of, platform=platform)
def _op_generic_StoU_saturation(self, value, min_value, max_value): #pylint:disable=no-self-use
"""
Return unsigned saturated BV from signed BV.
Min and max value should be unsigned.
"""
return claripy.If(
claripy.SGT(value, max_value),
max_value,
claripy.If(claripy.SLT(value, min_value), min_value, value))
def x86g_dirtyhelper_storeF80le(state, addr, qword):
sign = qword[63]
exponent = qword[62:52]
mantissa = qword[51:0]
normalized_exponent = exponent.zero_extend(4) - 1023 + 16383
zero_exponent = state.solver.BVV(0, 15)
inf_exponent = state.solver.BVV(-1, 15)
final_exponent = claripy.If(exponent == 0, zero_exponent, claripy.If(exponent == -1, inf_exponent, normalized_exponent))
normalized_mantissa = claripy.Concat(claripy.BVV(1, 1), mantissa, claripy.BVV(0, 11))
zero_mantissa = claripy.BVV(0, 64)
inf_mantissa = claripy.BVV(-1, 64)
final_mantissa = claripy.If(exponent == 0, zero_mantissa, claripy.If(exponent == -1, claripy.If(mantissa == 0, zero_mantissa, inf_mantissa), normalized_mantissa))
tbyte = claripy.Concat(sign, final_exponent, final_mantissa)
assert len(tbyte) == 80
state.memory.store(addr, tbyte, endness='Iend_LE')
return None, []
def generic_compare(self, args, comparison):
if self._vector_size is not None:
res_comps = []
for i in reversed(range(self._vector_count)):
a_comp = claripy.Extract((i+1) * self._vector_size - 1,
i * self._vector_size,
args[0])
b_comp = claripy.Extract((i+1) * self._vector_size - 1,
i * self._vector_size,
args[1])
res_comps.append(claripy.If(comparison(a_comp, b_comp),
claripy.BVV(-1, self._vector_size),
claripy.BVV(0, self._vector_size)))
return claripy.Concat(*res_comps)
else:
return claripy.If(comparison(args[0], args[1]), claripy.BVV(1, 1), claripy.BVV(0, 1))