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# reconnect to the board
self.target.dp.init()
self.target.dp.power_up_debug()
self.target.halt()
self.target.reset_and_halt()
# update core register to execute the init subroutine
result = self._call_function_and_wait(self.flash_algo['pc_init'], init=True)
# check the return code
if result != 0:
LOG.error('init error: %i', result)
class CC3220SF(CoreSightTarget):
VENDOR = "Texas Instruments"
memoryMap = MemoryMap(
RomRegion(start=0x00000000, length=0x00080000),
FlashRegion(start=0x01000000, length=0x00100000, blocksize=0x800, is_boot_memory=True, flash_class=Flash_cc3220sf),
RamRegion(start=0x20000000, length=0x40000)
)
def __init__(self, link):
super(CC3220SF, self).__init__(link, self.memoryMap)
def create_init_sequence(self):
seq = super(CC3220SF,self).create_init_sequence()
seq.wrap_task('create_cores', self.setup_CC3220SF_core)
return seq
'pc_verify' : 0x3FFF44B9,
'pc_uninit' : 0x3FFF44B5,
'pc_eraseAll' : 0x3FFF4125,
'pc_program_page' : 0x3FFF4479,
'pc_erase_sector' : 0x3FFF4139,
'static_base' : 0x3fff4000 + 0x00000020 + 0x000004b4,
'begin_data' : 0x3fff4000 + 0x00000A00,
'begin_stack' : 0x3fff4800,
'page_size' : 0x00000800,
'min_program_length' : 0x00000800,
'analyzer_supported' : False,
}
class NCS36510(CoreSightTarget):
VENDOR = "ONSemiconductor"
memoryMap = MemoryMap(
FlashRegion( start=0x2000, length=0x50000, blocksize=0x800, is_boot_memory=True,
algo=FLASH_ALGO),
RamRegion( start=0x3FFF4000, length=0xC000)
)
def __init__(self, link):
super(NCS36510, self).__init__(link, self.memoryMap)
'pc_init' : 0x20000047,
'pc_unInit': 0x20000075,
'pc_program_page': 0x200000fb,
'pc_erase_sector': 0x200000af,
'pc_eraseAll' : 0x20000083,
'static_base' : 0x20000000 + 0x00000020 + 0x0000014c,
'begin_stack' : 0x20000000 + 0x00000800,
'begin_data' : 0x20003000,
'page_buffers' : [0x20003000, 0x20004000],
'min_program_length' : 2,
'analyzer_supported' : True,
'analyzer_address' : 0x20002000
}
class STM32F412xE(CoreSightTarget):
VENDOR = "STMicroelectronics"
memoryMap = MemoryMap(
FlashRegion( start=0x08000000, length=0x10000, sector_size=0x4000,
page_size=0x1000,
is_boot_memory=True,
algo=FLASH_ALGO),
FlashRegion( start=0x08010000, length=0x10000, sector_size=0x10000,
page_size=0x1000,
algo=FLASH_ALGO),
FlashRegion( start=0x08020000, length=0x20000, sector_size=0x20000,
page_size=0x1000,
algo=FLASH_ALGO),
RamRegion( start=0x20000000, length=0x40000)
)
RamRegion(name="itcm", start=0x00000000, length=0x80000), # 512 KB
RomRegion(name="romcp", start=0x00200000, length=0x18000), # 96 KB
RomRegion(name="flexspi_alias", start=0x08000000, length=0x8000000, alias='flexspi'), # 128 MB
RamRegion(name="semc_alias", start=0x10000000, length=0x10000000, alias='semc'), # 256 MB
RamRegion(name="dtcm", start=0x20000000, length=0x80000), # 512 KB
RamRegion(name="ocram", start=0x20200000, length=0x80000), # 512 KB
FlashRegion(name="flexspi", start=0x60000000, length=0x1f800000, blocksize=0x40000,
is_boot_memory=True, algo=FLASH_ALGO_HYPERFLASH, page_size=0x200),
RamRegion(name="semc", start=0x80000000, end=0xdfffffff, is_external=True)
)
def __init__(self, link):
super(MIMXRT1052xxxxB_hyperflash, self).__init__(link, self.memoryMap)
self._svd_location = SVDFile.from_builtin("MIMXRT1052.xml")
class MIMXRT1052xxxxB_quadspi(CoreSightTarget):
VENDOR = "NXP"
# Note: itcm, dtcm, and ocram share a single 512 KB block of RAM that can be configurably
# divided between those regions (this is called FlexRAM). Thus, the memory map regions for
# each of these RAMs allocate the maximum possible of 512 KB, but that is the maximum and
# will not actually be available in all regions simultaneously.
memoryMap = MemoryMap(
RamRegion(name="itcm", start=0x00000000, length=0x80000), # 512 KB
RomRegion(name="romcp", start=0x00200000, length=0x18000), # 96 KB
RomRegion(name="flexspi_alias", start=0x08000000, length=0x8000000, alias='flexspi'), # 128 MB
RamRegion(name="semc_alias", start=0x10000000, length=0x10000000, alias='semc'), # 256 MB
RamRegion(name="dtcm", start=0x20000000, length=0x80000), # 512 KB
RamRegion(name="ocram", start=0x20200000, length=0x80000), # 512 KB
FlashRegion(name="flexspi", start=0x60000000, length=0x1f800000, blocksize=0x1000,
is_boot_memory=True, algo=FLASH_ALGO_QUADSPI, page_size=0x100),
0x40002000, 0x00000060, 0x00000020, 0x00000000, 0x00200000, 0x00002000
],
'pc_init' : 0x20000021,
'pc_eraseAll' : 0x20000093,
'pc_erase_sector' : 0x200000DD,
'pc_program_page' : 0x2000012B,
'begin_data' : 0x20004000, # Analyzer uses a max of 128B data (32 pages * 4 bytes / page)
'page_buffers' : [0x20006000, 0x20008000], # Enable double buffering
'begin_stack' : 0x20002000,
'static_base' : 0x20000278,
'min_program_length' : 4,
'analyzer_supported' : True,
'analyzer_address' : 0x2000A000 # Analyzer 0x2000A000..0x2000A600
}
class MAX32630(CoreSightTarget):
VENDOR = "Maxim"
memoryMap = MemoryMap(
FlashRegion( start=0, length=0x200000, blocksize=0x2000, is_boot_memory=True, algo=FLASH_ALGO),
RamRegion( start=0x20000000, length=0x40000),
)
def __init__(self, link):
super(MAX32630, self).__init__(link, self.memoryMap)
self._svd_location = SVDFile.from_builtin("max32630.svd")
0x40002000, 0x00000060, 0x00000020, 0x00000000, 0x00200000, 0x00002000
],
'pc_init' : 0x20000021,
'pc_eraseAll' : 0x20000093,
'pc_erase_sector' : 0x200000DD,
'pc_program_page' : 0x2000012B,
'begin_data' : 0x20004000, # Analyzer uses a max of 128B data (32 pages * 4 bytes / page)
'page_buffers' : [0x20006000, 0x20008000], # Enable double buffering
'begin_stack' : 0x20002000,
'static_base' : 0x20000278,
'min_program_length' : 4,
'analyzer_supported' : True,
'analyzer_address' : 0x2000A000 # Analyzer 0x2000A000..0x2000A600
}
class MAX32625(CoreSightTarget):
VENDOR = "Maxim"
memoryMap = MemoryMap(
FlashRegion( start=0, length=0x80000, blocksize=0x2000, is_boot_memory=True, algo=FLASH_ALGO),
RamRegion( start=0x20000000, length=0x28000),
)
def __init__(self, link):
super(MAX32625, self).__init__(link, self.memoryMap)
self._svd_location = SVDFile.from_builtin("max32625.svd")
'begin_data' : 0x20000000 + 0x1000,
'page_size' : 0x4000,
'analyzer_supported' : False,
'analyzer_address' : 0x00000000,
'page_buffers' : [0x20001000, 0x20005000], # Enable double buffering
'min_program_length' : 0x4000,
# Flash information
'flash_start': 0xa000000,
'flash_size': 0x400000,
'sector_sizes': (
(0x0, 0x4000),
)
}
class MuscaB1(CoreSightTarget):
VENDOR = "Arm"
memoryMap = MemoryMap(
FlashRegion(name='neflash', start=0x0A000000, length=0x00200000, access='rx',
blocksize=0x4000,
page_size=0x4000,
is_boot_memory=False,
is_default=False,
algo=FLASH_ALGO_EFLASH),
FlashRegion(name='seflash', start=0x1A000000, length=0x00200000, access='rxs',
blocksize=0x4000,
page_size=0x4000,
is_boot_memory=False,
is_default=False,
algo=FLASH_ALGO_EFLASH,
'page_size' : 0x400,
'analyzer_supported' : False,
'analyzer_address' : 0x00000000,
'page_buffers' : [0x20001000],
'min_program_length' : 0x400,
# Flash information
'flash_start': 0x8000000,
'flash_size': 0x8000,
'sector_sizes': (
(0x0, 0x80),
)
}
class STM32L031x6(CoreSightTarget):
VENDOR = "STMicroelectronics"
memoryMap = MemoryMap(
FlashRegion(name='Flash', start=0x08000000, length=0x8000, blocksize=0x1000, is_boot_memory=True, algo=FLASH_ALGO),
RamRegion(name='RAM', start=0x20000000, length=0x2000),
FlashRegion(name='EEPROM', start=0x08080000, length=0x400, blocksize=0x400, algo=FLASH_ALGO)
)
def __init__(self, link):
super(STM32L031x6, self).__init__(link, self.memoryMap)
self._svd_location = SVDFile.from_builtin("STM32L0x1.svd")
def create_init_sequence(self):
seq = super(STM32L031x6, self).create_init_sequence()
0x00004770, 0x4001e500, 0x4001e400, 0x10001000, 0x40010400, 0x40010500, 0x40010600, 0x6e524635,
0x00000000, ],
'pc_init' : 0x20000021,
'pc_eraseAll' : 0x20000029,
'pc_erase_sector' : 0x20000049,
'pc_program_page' : 0x20000071,
'begin_data' : 0x20002000, # Analyzer uses a max of 1 KB data (256 pages * 4 bytes / page)
'page_buffers' : [0x20002000, 0x20002400], # Enable double buffering
'begin_stack' : 0x20001000,
'static_base' : 0x20000170,
'min_program_length' : 4,
'analyzer_supported' : True,
'analyzer_address' : 0x20003000 # Analyzer 0x20003000..0x20003600
}
class NRF51(CoreSightTarget):
VENDOR = "Nordic Semiconductor"
memoryMap = MemoryMap(
FlashRegion( start=0, length=0x40000, blocksize=0x400, is_boot_memory=True,
algo=FLASH_ALGO),
# User Information Configation Registers (UICR) as a flash region
FlashRegion( start=0x10001000, length=0x100, blocksize=0x100, is_testable=False,
algo=FLASH_ALGO),
RamRegion( start=0x20000000, length=0x4000)
)
def __init__(self, link):
super(NRF51, self).__init__(link, self.memoryMap)
self._svd_location = SVDFile.from_builtin("nrf51.svd")
'page_buffers': [0x08001000, 0x08001200], # Enable double buffering
'min_program_length': 0x200,
# Flash information
'flash_start': 0x16000000,
'flash_size': 0x8000,
'sector_sizes': (
(0x0, 0x200),
)
}
ERASE_ALL_WEIGHT = 0.5 # Time it takes to perform a chip erase
ERASE_SECTOR_WEIGHT = 0.05 # Time it takes to erase a page
PROGRAM_PAGE_WEIGHT = 0.07 # Time it takes to program a page (Not including data transfer time)
class CY8C6xx7(CoreSightTarget):
VENDOR = "Cypress"
memoryMap = MemoryMap(
RomRegion(start=0x00000000, length=0x20000),
FlashRegion(start=0x10000000, length=0x100000, blocksize=0x200,
is_boot_memory=True,
erased_byte_value=0,
algo=flash_algo_main,
erase_all_weight=ERASE_ALL_WEIGHT,
erase_sector_weight=ERASE_SECTOR_WEIGHT,
program_page_weight=PROGRAM_PAGE_WEIGHT),
FlashRegion(start=0x14000000, length=0x8000, blocksize=0x200,
is_boot_memory=False,
erased_byte_value=0,
algo=flash_algo_work,
erase_all_weight=ERASE_ALL_WEIGHT,