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def test_veriltor_load():
# define an empty circuit
mod = kratos.Generator("mod")
with tempfile.TemporaryDirectory() as temp:
def run_test():
# -g without the db dump
circuit = kratos.util.to_magma(mod, insert_debug_info=True)
tester = fault.Tester(circuit)
tester.compile_and_run(target="verilator",
directory=temp,
magma_output="verilog",
use_kratos=True)
mock_debugger(run_test)
def test_load_runtime():
# define an empty circuit
mod = kratos.Generator("mod")
with tempfile.TemporaryDirectory() as temp:
def run_test():
# -g without the db dump
circuit = kratos.util.to_magma(mod, insert_debug_info=True)
tester = fault.Tester(circuit)
tester.compile_and_run(target="system-verilog",
simulator="ncsim",
directory=temp,
magma_output="verilog",
use_kratos=True)
mock_debugger(run_test)